"By participating in the compliance program, Cadence is helping to further the continued adoption of the PCIe architecture." ![]() "As a long-standing PCI-SIG member, Cadence plays a role in the advancement of PCIe technology," said Al Yanes, President and Chairperson of PCI-SIG. "Cadence's latest PHY and Controller IP demonstrate their commitment to PCIe 5.0 performance and interoperability with our 12th Gen Intel Core and 4th Gen Intel Xeon Scalable platforms." "Intel is dedicated to industry-wide innovation and rigorous compatibility testing through the open PCI Express standard," said Jim Pappas, director of Technology Initiatives, Intel Corporation. "Cadence is at the leading edge of high-bandwidth hyperscale SoC IP, and their successful track record in PCI-SIG compliance events should project continued confidence in their solutions and the technology as a whole." "Consistent with previous testing, Cadence's PHY and controller test chips for the PCIe 5.0 specification showed robust performance in compliance tests on our Xgig exerciser and analyzer platform," said Tom Fawcett, senior vice president and general manager, Lab & Production Business Unit, VIAVI Solutions. "With our multi-lane subsystem-on-a-chip solution, our customers can see IP compliance being achieved in form factors that match their target applications." "With the lowest power consumption in the market as validated by our customers, Cadence's certified PHY and Controller IP for PCIe 5.0 enables them to develop extremely power-efficient SoCs," said Sanjive Agarwala, corporate vice president and general manager of the IP Group at Cadence. "Our continued close collaboration with Cadence is helping our mutual customers meet the stringent power and performance requirements and accelerate silicon innovation with leading-edge design solutions benefiting from TSMC's advanced technologies." "We are pleased Cadence has certified its comprehensive IP family for compliance with the PCIe 5.0 protocol on TSMC's advanced processes," said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC.
0 Comments
Leave a Reply. |
Details
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |